hft-chip
Unverified Other strategy on Multi by noah-gigler. BotFinder score 18 out of 100.
A full-custom ASIC that trades: four hardware order books and three trading strategies in 130nm silicon
Source: github
BotFinder analysis pending.
hft-chip
hft-chip A full-custom ASIC that trades. It ingests market data, maintains four order books in hardware, and runs three trading strategies concurrently, emitting a trade decision every clock cycle with no processor in the loop. Taped out on IHP SG13G2 130 nm, 2500 × 2000 µm, QFN-64. DRC and LVS clean. Why put a trading strategy in silicon The point of doing this in hardware is latency. For reference we implemented the same three strategies in C and benchmarked them on the CROC RISC-V soft core running on the same process: | Strategy | Hardware cycles | Software cycles | Speedup | |---|---|---|---| | Arbitrage | 7 | 18,307 | 2,615× | | Momentum | 3 | 6,559 | 2,186× | | EMA mean-reversion | 3 | 8,617 | 2,872× | Roughly 2,000–2,900× fewer cycles per trade. The hardware also evaluates all three strategies in parallel every cycle, where the processor has to run them in sequence. Architecture hftchip is a thin top level: pad ring plus boundary I/O registers. All logic lives in hftcore. - 4 order books, one per market, each tracking bids and asks across N=64 price levels. Best bid and best
⚠ No verified equity curve — no track-record source connected.
Drawdown profile
Data unavailable — contact the owner.
Verification ledger
How the score has moved
Recalculated at each data collection. Transparency means showing the bad weeks too.
No score history is stored yet — only the current score is shown.
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⚠ No live verification account connected — ask for proof before buying.
Alerts on changes: coming soon
Prop-firm compatibility not provided.
Open-source maintainer on GitHub.
Data-completeness & trust index (not a profitability rating)